REVIEW ON FLOATING POINT FFT PROCESSOR BASED ON RADIX-4 ALGORITHM USING VHDL

Abstract

The Fast Fourier Transform (FFT) is one of the rudimentary operations in field of digital signal and image processing. Some of the applications of the fast Fourier transform include Signal analysis,Sound filtering, Data compression, Partial differential equations, Multiplication of large integers, Image filtering etc. Fast Fourier transform (FFT) is an efficient implementation of the discrete Fourier transform (DFT). The FFT can be designed by radix-4 butterfly algorithm which requires needless computations and data storage. It consumes less power. Using IEEE-754 single precision floating-point
format the Fast Fourier Transform (FFT) for real numbers can be computed which is design in Xilinx software. The floating-point addition, subtraction and multiplication which are repeatedly used in radix-4 butterfly algorithm. In this paper, we will analyze the floating point FFT based on radix-4 algorithm using VHDL. Our aim is to design floating point radix-4 FFT processor because it is proposed that radix4 algorithm requires less area and less time or delay as compared to radix-2 algorithm. This new architecture reduces computation complexity, data storage, areas and power consumption