Review on Design of High Speed DMA Controller using VHDL

Abstract

In order to increase the parallelism of system operations, it is necessary to use DMA (DirectMemory-Access) controller instead of processor to accomplish data movement task. A DMA controller temporarily borrows the address bus, data bus and control bus from the microprocessor and transfers the data bytes directly between an I/O port and a series of memory locations. To remedy the shortcomings of the traditional DMA, an optimized DMA architecture is proposed to gain flexibility and reduce complexity. Especially, descriptor buffer can accept a scheduled request in advance in such a manner that can predominantly reduce the configuration times. For this designing purpose, VHDL language has been used as it enables the user to first simulate and verify the program in a software and then implementation at hardware level. The programming is been done on Xilinx software. Initially inputs are provided by the test bench to the DMA so as to perform the operations as per the requirement of the programmer. The result generated is stored in memory by the write signal provided by it. Next the read signal is generated by the DMA to use the result stored in the memory at the specified location.