AN EFFICIENT FAULT TOLERANT IIR FILTERS BASED ON ERROR CORRECTION CODES

Abstract

Filters are broadly used in dealing out with signal processing and communication systems. The filters so used are digital filters. In those systems, accuracy to efficient operation of signal are insignificant and that is why implementation of fault tolerant filters are needed. Over the duration, lots of techniques that make use of the filters structure and properties to achieve fault tolerance have been proposed. Enhancing technology makes system more complex that include many filters. In those complex systems, it is frequent to have number of filters in circuit that functions in parallel architecture. In parallel combination of filters there apply the same filter to different input signals. In recent times researcher has projected, a simple technique having the existence of parallel filters to accomplish fault tolerance. So, from this case study the idea to implement parallel filters and digitally correct the errors are generalized. It has been proposed to protect digital circuits in signal processing by single error detecting codes and single error correcting codes. This scheme permits extra efficient protection in presence of large number of parallel filters. The technique has evaluated using study on parallel infinite impulse response filters making effectiveness in terms of protection and implementation cost. The enhanced hase BCH decoder is designed using hardware description language called Verilog and synthesized in Xilinx ISE 13.2.